module smb1_top (

//-----------sys-----------
	input			sys_resetn,
                                                              
//-----------clk-----------
	input			clk1_out_s,
	input	[4:1]		clk2_out_s, 
	input			clkout_n,
	input			clkout_p,
	input			clk_from_scruz,
                                                          
//-----------fse-----------
	output	[26:0]		fse_a, 
	inout	[31:0]		fse_d, 
                        
//-----------enet-----------
	output			enet_adsn,                     
	output			enet_aen,
	output	[3:0]		enet_ben, 
//	input			enet_cyclen,
//	input			enet_datacsn,
	input			enet_intrq0,
//	input			enet_iochrdy,
	output			enet_iorn,                       
	output			enet_iown,
//	input			enet_lclk,
//	input			enet_ldevn,
//	input			enet_rdyrtnn,
	output			enet_reset,
//	input			enet_srdyn,
//	input			enet_vlbusn,
//	input			enet_w_rn,
                        
//-----------flash-----------
	output			flash_cen,
	output			flash_oen,
//	input			flash_rdy_bsyn,
	output			flash_resetn,
	output			flash_wen,
                        
//-----------sram-----------
	output	[3:0]		sram_ben, 
	output			sram_csn,
	output			sram_oen,
	output			sram_wen,
/*                        
//-----------ddra-----------                                          
	input	[12:0]		ddra_a, 
	input	[1:0]		ddra_ba, 
	input			ddra_casn,
	input			ddra_cke,
	input			ddra_ck_n,
	input			ddra_ck_p,
	input			ddra_csn,
	input	[15:0]		ddra_dq, 
	input			ddra_ldm,
	input			ddra_ldqs,
	input			ddra_rasn,
	input			ddra_udm,
	input			ddra_udqs,
	input			ddra_wen,
                        
//-----------ddrb-----------
	input			ddrb_cke,
	input			ddrb_csn,
	input	[15:0]		ddrb_dq, 
	input			ddrb_ldm,
	input			ddrb_ldqs,
	input			ddrb_udm,
	input			ddrb_udqs,
                        
//-----------ddrc-----------
	input			ddrc_cke,
	input			ddrc_csn,
	input	[15:0]		ddrc_dq, 
	input			ddrc_ldm,
	input			ddrc_ldqs,
	input			ddrc_udm,
	input			ddrc_udqs,
                        
//-----------ddrd-----------
	input			ddrd_cke,
	input			ddrd_csn,
	input	[15:0]		ddrd_dq, 
	input			ddrd_ldm,
	input			ddrd_ldqs,
	input			ddrd_udm,
	input			ddrd_udqs,
                        
//-----------ddre-----------
	input	[12:0]		ddre_a, 
	input	[1:0]		ddre_ba, 
	input			ddre_casn,                       
	input	[7:0]		ddre_cb, 
//---single net name found in conjunction with numbered signals
	input			ddre_cke,
//---single net name found in conjunction with numbered signals
	input			ddre_cke1,
	input	[2:0]		ddre_ck_n, 
	input	[2:0]		ddre_ck_p, 
	input			ddre_csn,
//---Found multiple nets with the same name
	input			ddre_dll_clk_out,	// pin aj19 instance 0 
	input			ddre_dll_clk_in,	// pin ak19 instance 1 
	input	[8:0]		ddre_dm, 
	input	[63:0]		ddre_dq, 
	input	[8:0]		ddre_dqs, 
	input			ddre_fbclk,
	input			ddre_fbclk_out,
	input			ddre_rasn,
	input			ddre_scl,
	input			ddre_sda,
	input			ddre_sma_dll_clk,
	input			ddre_wen,
   
*/  
 
//-----------config-----------
//	input	[7:0]	config_d, 
                        
//-----------s_-----------
//	input			s_alertn,
//	input			s_overtempn,
//	input			s_pll_ena,
//	input			s_smb_clk,
//	input			s_smb_data,
                        
//-----------sma-----------
//	input			sma_clk_n,
//	input			sma_clk_p,
//	input			sma_fb_n,
//	input			sma_fb_p,
                        
//-----------dip-----------
	input	[15:0]		dip,                                  
                        
//-----------dig-----------
	output			dig_1_a,
	output			dig_1_b,
	output			dig_1_c,
	output			dig_1_d,     
	output			dig_1_dp,
	output			dig_1_e,
	output			dig_1_f,
	output			dig_1_g,
	output			dig_2_a,
	output			dig_2_b,
	output			dig_2_c,
	output			dig_2_d,
	output			dig_2_dp,
	output			dig_2_e,
	output			dig_2_f,
	output			dig_2_g,
                        
//-----------proto-----------
	inout	[39:0]		proto1_io,     
	
//-----------scruz-----------
	output			scruz_cardseln,
	output			ck_to_scruz,  
                          
//-----------max_led-----------
	output	[7:0]		max_led, 

	
/*
//-----------rlds-----------
	input	[22:0]		rlds_a, 
	input	[2:0]		rlds_ba, 
	input			rlds_ck_n,
	input			rlds_ck_p,
	input			rlds_csn,
	input	[17:0]		rlds_d, 
	input			rlds_dm,
	input	[17:0]		rlds_q, 
	input	[1:0]		rlds_qk_n, 
	input	[1:0]		rlds_qk_p, 
	input			rlds_qvld,
	input			rlds_refn,
	input			rlds_wen,
                        
//-----------rldc-----------
	input			rldc2_csn,
	input			rldc2_dm,
	input	[15:0]		rldc2_dq, 
	input	[1:0]		rldc2_qk_p, 
	input			rldc2_qvld,
	input	[22:0]		rldc_a, 
	input	[2:0]		rldc_ba, 
	input			rldc_ck_out,
	input			rldc_csn,
	input			rldc_dm,
	input	[15:0]		rldc_dq, 
	input	[1:0]		rldc_qk_p, 
	input			rldc_qvld,
	input			rldc_refclk_n,
	input			rldc_refclk_p,
	input			rldc_refn,
	input			rldc_wen,      
	
*/
                        
//-----------pb-----------
	input	[2:0]		pb, 
	input			pb_dev_clrn,
                        
//-----------rs232-----------
//	input			rs232a_cts,
//	input			rs232a_rts,
	input			rs232a_rxd,
	output			rs232a_txd,
//	input			rs232b_cts,
//	input			rs232b_rts,
	input			rs232b_rxd,
	output			rs232b_txd,

	
/*
//-----------vref-----------
//---Found multiple nets with the same name
	input			vrefio_loopin,       
	input			vrefio_loopout,
	input			vrefio_smain,
	input			vrefio_smaout,
*/


	/*
//-----------ddrup-----------
//---Found multiple nets with the same name
	input			ddrupdnb_in,	// pin ag11 instance 0 
	input			ddrupdnb_out,	// pin ag12 instance 1 
//---Found multiple nets with the same name
	input			ddrupdnt_in,	// pin g11 instance 0 
	input			ddrupdnt_out,	// pin g12 instance 1 
                        
//-----------endd-----------
//---Found multiple nets with the same name
	input			enddrb_in,	// pin ae12 instance 0 
	input			enddrb_out,	// pin ae11 instance 1 
//---Found multiple nets with the same name
	input			enddrt_in,	// pin j11 instance 0 
	input			enddrt_out,	// pin j12 instance 1 
*/
	

//-----------cpld-----------
	inout	[1:0]	cpld_user, 


//-----------ddr_-----------
//	input			ddr_fbclk,
//	input			ddr_fbclk_r,                   

	
/*
//-----------rld_-----------
	input			rld_buf_fbclk_n,
	input			rld_buf_fbclk_p,
//---Found multiple nets with the same name
	input			rld_dll_clk_out,	// pin b19 instance 0 
	input			rld_dll_clk_in,	// pin a19 instance 1 
//---Found multiple nets with the same name
	input			rld_fbclk_n_out,	// pin a16 instance 0 
	input			rld_fbclk_n_in,	// pin l28 instance 1 
//---Found multiple nets with the same name
	input			rld_fbclk_p_out,	// pin b16 instance 0 
	input			rld_fbclk_p_in,	// pin l29 instance 1 
	input			rld_sma_dll_clk,
*/                                                          
                        
//-----------Others-----------                                      	
//	input			crc_error,
	input			ref_lock
	//--Remove last ","                                         

);
                             

endmodule