DE2_115_SOPC |
|
2010.07.07.16:07:30 | Datasheet |
clk_50 | DE2_115_SOPC |
sdram | |
zs_addr | |
zs_ba | |
zs_cas_n | |
zs_cke | |
zs_cs_n | |
zs_dq | |
zs_dqm | |
zs_ras_n | |
zs_we_n | |
key | |
in_port | |
in_port | |
out_port | |
in_port | |
out_port | |
out_port | |
rxd | |
txd | |
cts_n | |
rts_n | |
out_port | |
bidir_port | |
out_port | |
bidir_port | |
lcd | |
LCD_data | |
LCD_E | |
LCD_RS | |
LCD_RW | |
ir | |
in_port | |
out_port | |
bidir_port | |
bidir_port | |
in_port | |
tse_mac | |
rgmii_in | |
rgmii_out | |
rx_control | |
tx_control | |
tx_clk | |
rx_clk | |
set_10 | |
set_1000 | |
ena_10 | |
eth_mode | |
mdio_out | |
mdio_oen | |
mdio_in | |
mdc | |
cpu | sgdma_tx | sgdma_rx | ||||||
instruction_master | data_master | descriptor_read | descriptor_write | m_read | descriptor_read | descriptor_write | m_write | |
cpu | ||||||||
jtag_debug_module | 0x0b441800 | 0x0b441800 | ||||||
sysid | ||||||||
control_slave | 0x09000140 | 0x09000140 | ||||||
timer | ||||||||
s1 | 0x09000000 | 0x09000000 | ||||||
onchip_memory2 | ||||||||
s1 | 0x0b420000 | 0x0b420000 | ||||||
cfi_flash | ||||||||
s1 | 0x0a800000 | 0x0a800000 | ||||||
sdram | ||||||||
s1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | ||||
key | ||||||||
s1 | 0x09000060 | 0x09000060 | ||||||
sma_in | ||||||||
s1 | 0x0b4424a0 | |||||||
sma_out | ||||||||
s1 | 0x0b4424b0 | |||||||
sw | ||||||||
s1 | 0x09000070 | 0x09000070 | ||||||
ledg | ||||||||
s1 | 0x09000080 | 0x09000080 | ||||||
ledr | ||||||||
s1 | 0x09000090 | 0x09000090 | ||||||
rs232 | ||||||||
s1 | 0x09000020 | 0x09000020 | ||||||
i2c_scl | ||||||||
s1 | 0x090000a0 | 0x090000a0 | ||||||
i2c_sda | ||||||||
s1 | 0x090000b0 | 0x090000b0 | ||||||
eep_i2c_scl | ||||||||
s1 | 0x090000c0 | 0x090000c0 | ||||||
eep_i2c_sda | ||||||||
s1 | 0x090000d0 | 0x090000d0 | ||||||
lcd | ||||||||
control_slave | 0x090000e0 | 0x090000e0 | ||||||
ir | ||||||||
s1 | 0x090000f0 | 0x090000f0 | ||||||
sram | ||||||||
avalon_slave | 0x0b200000 | 0x0b200000 | ||||||
seg7 | ||||||||
avalon_slave | 0x09000040 | 0x09000040 | ||||||
audio | ||||||||
avalon_slave | 0x0b442480 | |||||||
jtag_uart | ||||||||
avalon_jtag_slave | 0x0b4424d0 | |||||||
sd_clk | ||||||||
s1 | 0x09000100 | 0x09000100 | ||||||
sd_cmd | ||||||||
s1 | 0x09000110 | 0x09000110 | ||||||
sd_dat | ||||||||
s1 | 0x09000120 | 0x09000120 | ||||||
sd_wp_n | ||||||||
s1 | 0x09000130 | 0x09000130 | ||||||
pll | ||||||||
pll_slave | 0x0b4424c0 | |||||||
usb | ||||||||
hc | 0x0b4424d8 | |||||||
dc | 0x0b4424e0 | |||||||
tse_mac | ||||||||
control_port | 0x0b442000 | |||||||
sgdma_tx | ||||||||
csr | 0x0b442400 | |||||||
sgdma_rx | ||||||||
csr | 0x0b442440 | |||||||
descriptor_memory | ||||||||
s1 | 0x0b440000 | 0x0b440000 | 0x0b440000 | 0x0b440000 | 0x0b440000 |
Parameters
|
Software Assignments(none) |
pll | c0 | cpu | |
clk | |||
d_irq | timer | ||
irq | |||
instruction_master | onchip_memory2 | ||
s1 | |||
data_master | |||
s1 | |||
instruction_master | clock_crossing_io | ||
s1 | |||
data_master | |||
s1 | |||
instruction_master | tri_state_bridge_flash | ||
avalon_slave | |||
data_master | |||
avalon_slave | |||
instruction_master | sdram | ||
s1 | |||
data_master | |||
s1 | |||
d_irq | key | ||
irq | |||
data_master | sma_in | ||
s1 | |||
data_master | sma_out | ||
s1 | |||
d_irq | sw | ||
irq | |||
d_irq | rs232 | ||
irq | |||
instruction_master | sram | ||
avalon_slave | |||
data_master | |||
avalon_slave | |||
data_master | jtag_uart | ||
avalon_jtag_slave | |||
d_irq | |||
irq | |||
data_master | pll | ||
pll_slave | |||
data_master | audio | ||
avalon_slave | |||
data_master | usb | ||
hc | |||
d_irq | |||
hc_irq | |||
data_master | |||
dc | |||
d_irq | |||
dc_irq | |||
data_master | tse_mac | ||
control_port | |||
data_master | sgdma_tx | ||
csr | |||
d_irq | |||
csr_irq | |||
data_master | sgdma_rx | ||
csr | |||
d_irq | |||
csr_irq | |||
data_master | descriptor_memory | ||
s1 |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | sysid |
control_slave | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
cpu | d_irq | timer |
irq | ||
clock_crossing_io | m1 | |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments
|
cpu | instruction_master | clock_crossing_io | |
s1 | |||
data_master | |||
s1 | |||
pll | c0 | ||
clk_s1 | |||
c2 | |||
clk_m1 | |||
m1 | timer | ||
s1 | |||
m1 | sysid | ||
control_slave | |||
m1 | key | ||
s1 | |||
m1 | sw | ||
s1 | |||
m1 | ledg | ||
s1 | |||
m1 | ledr | ||
s1 | |||
m1 | rs232 | ||
s1 | |||
m1 | i2c_scl | ||
s1 | |||
m1 | i2c_sda | ||
s1 | |||
m1 | eep_i2c_scl | ||
s1 | |||
m1 | eep_i2c_sda | ||
s1 | |||
m1 | lcd | ||
control_slave | |||
m1 | ir | ||
s1 | |||
m1 | seg7 | ||
avalon_slave | |||
m1 | sd_clk | ||
s1 | |||
m1 | sd_cmd | ||
s1 | |||
m1 | sd_dat | ||
s1 | |||
m1 | sd_wp_n | ||
s1 |
Parameters
|
Software Assignments(none) |
cpu | instruction_master | tri_state_bridge_flash | |
avalon_slave | |||
data_master | |||
avalon_slave | |||
pll | c0 | ||
clk | |||
tristate_master | cfi_flash | ||
s1 |
Parameters
|
Software Assignments(none) |
tri_state_bridge_flash | tristate_master | cfi_flash |
s1 | ||
pll | c0 | |
clk |
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments
|
cpu | d_irq | key |
irq | ||
clock_crossing_io | m1 | |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments
|
cpu | d_irq | sw |
irq | ||
clock_crossing_io | m1 | |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | ledg |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | ledr |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
cpu | d_irq | rs232 |
irq | ||
clock_crossing_io | m1 | |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | i2c_scl |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | i2c_sda |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | eep_i2c_scl |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | eep_i2c_sda |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | lcd |
control_slave | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments(none) |
clock_crossing_io | m1 | ir |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
Parameters
|
Software Assignments(none) |
clock_crossing_io | m1 | seg7 |
avalon_slave | ||
pll | c2 | |
clock_sink |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | sd_clk |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | sd_cmd |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | sd_dat |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
clock_crossing_io | m1 | sd_wp_n |
s1 | ||
pll | c2 | |
clk |
Parameters
|
Software Assignments
|
cpu | data_master | pll | |
pll_slave | |||
clk_50 | clk | ||
inclk_interface | |||
c0 | jtag_uart | ||
clk | |||
c0 | cpu | ||
clk | |||
c0 | onchip_memory2 | ||
clk1 | |||
c0 | sdram | ||
clk | |||
c0 | sram | ||
clock_reset | |||
c0 | sma_in | ||
clk | |||
c0 | sma_out | ||
clk | |||
c0 | tri_state_bridge_flash | ||
clk | |||
c0 | clock_crossing_io | ||
clk_s1 | |||
c2 | |||
clk_m1 | |||
c2 | timer | ||
clk | |||
c2 | sysid | ||
clk | |||
c2 | key | ||
clk | |||
c2 | sw | ||
clk | |||
c2 | ledg | ||
clk | |||
c2 | ledr | ||
clk | |||
c2 | rs232 | ||
clk | |||
c2 | i2c_scl | ||
clk | |||
c2 | i2c_sda | ||
clk | |||
c2 | eep_i2c_scl | ||
clk | |||
c2 | eep_i2c_sda | ||
clk | |||
c2 | lcd | ||
clk | |||
c2 | ir | ||
clk | |||
c2 | sd_clk | ||
clk | |||
c2 | sd_cmd | ||
clk | |||
c2 | sd_dat | ||
clk | |||
c2 | sd_wp_n | ||
clk | |||
c2 | seg7 | ||
clock_sink | |||
c0 | audio | ||
clock_sink | |||
c0 | cfi_flash | ||
clk | |||
c0 | usb | ||
hc_clock | |||
c0 | |||
dc_clock | |||
c0 | tse_mac | ||
receive_clock_connection | |||
c0 | |||
transmit_clock_connection | |||
c0 | |||
control_port_clock_connection | |||
c0 | sgdma_tx | ||
clk | |||
c0 | sgdma_rx | ||
clk | |||
c0 | descriptor_memory | ||
clk1 |
Parameters
|
Software Assignments(none) |
Parameters
|
Software Assignments(none) |
pll | c0 | tse_mac | |
receive_clock_connection | |||
c0 | |||
transmit_clock_connection | |||
c0 | |||
control_port_clock_connection | |||
cpu | data_master | ||
control_port | |||
sgdma_tx | out | ||
transmit | |||
receive | sgdma_rx | ||
in |
Parameters
|
Software Assignments
|
pll | c0 | sgdma_tx | |
clk | |||
cpu | data_master | ||
csr | |||
d_irq | |||
csr_irq | |||
out | tse_mac | ||
transmit | |||
descriptor_read | descriptor_memory | ||
s1 | |||
descriptor_write | |||
s1 | |||
m_read | sdram | ||
s1 |
Parameters
|
Software Assignments
|
pll | c0 | sgdma_rx | |
clk | |||
cpu | data_master | ||
csr | |||
d_irq | |||
csr_irq | |||
tse_mac | receive | ||
in | |||
descriptor_write | descriptor_memory | ||
s1 | |||
descriptor_read | |||
s1 | |||
m_write | sdram | ||
s1 |
Parameters
|
Software Assignments
|
pll | c0 | descriptor_memory |
clk1 | ||
cpu | data_master | |
s1 | ||
sgdma_rx | descriptor_write | |
s1 | ||
descriptor_read | ||
s1 | ||
sgdma_tx | descriptor_read | |
s1 | ||
descriptor_write | ||
s1 |
Parameters
|
Software Assignments
|
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