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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 10.246 ns
From           : MS1
To             : ram_adr[6]
From Clock     : --
To Clock       : OSC
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 11.914 ns
From           : leddisp_reg[11]
To             : LD12
From Clock     : OSC
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -2.635 ns
From           : MS6
To             : digite[0]
From Clock     : --
To Clock       : OSC
Failed Paths   : 0

Type           : Clock Setup: 'pll_lcd:vga_pll|altpll:altpll_component|_clk0'
Slack          : -4.725 ns
Required Time  : 27.00 MHz ( period = 37.037 ns )
Actual Time    : N/A
From           : leddisp_reg[10]
To             : led_reg[10]
From Clock     : OSC
To Clock       : pll_lcd:vga_pll|altpll:altpll_component|_clk0
Failed Paths   : 42

Type           : Clock Setup: 'OSC'
Slack          : 13.634 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : 157.08 MHz ( period = 6.366 ns )
From           : digitf[2]
To             : digite[1]
From Clock     : OSC
To Clock       : OSC
Failed Paths   : 0

Type           : Clock Hold: 'OSC'
Slack          : -0.891 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : N/A
From           : digitc[0]
To             : bin_in[0]
From Clock     : OSC
To Clock       : OSC
Failed Paths   : 9

Type           : Clock Hold: 'pll_lcd:vga_pll|altpll:altpll_component|_clk0'
Slack          : 0.445 ns
Required Time  : 27.00 MHz ( period = 37.037 ns )
Actual Time    : N/A
From           : display_driver:vga640x480|v_sync
To             : display_driver:vga640x480|v_sync
From Clock     : pll_lcd:vga_pll|altpll:altpll_component|_clk0
To Clock       : pll_lcd:vga_pll|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 51

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