{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Info: Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Full Version " "Info: Version 9.0 Build 132 02/25/2009 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Sat May 09 04:57:18 2009 " "Info: Processing started: Sat May 09 04:57:18 2009" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off vga_data -c vga_data " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off vga_data -c vga_data" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "clock_module.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file clock_module.v" { { "Info" "ISGN_ENTITY_NAME" "1 clock_module " "Info: Found entity 1: clock_module" { } { { "clock_module.v" "" { Text "E:/vga_data_restored/clock_module.v" 1 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Info" "IVRFX_L3_VERI_OBJ_DIFF_ONLY_IN_CASE" "h_sync H_SYNC display_driver.v(26) " "Info (10281): Verilog HDL Declaration information at display_driver.v(26): object \"h_sync\" differs only in case from object \"H_SYNC\" in the same scope" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 26 0 0 } } } 0 10281 "Verilog HDL Declaration information at %3!s!: object \"%1!s!\" differs only in case from object \"%2!s!\" in the same scope" 1 0 "" 0 -1} { "Info" "IVRFX_L3_VERI_OBJ_DIFF_ONLY_IN_CASE" "v_sync V_SYNC display_driver.v(27) " "Info (10281): Verilog HDL Declaration information at display_driver.v(27): object \"v_sync\" differs only in case from object \"V_SYNC\" in the same scope" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 27 0 0 } } } 0 10281 "Verilog HDL Declaration information at %3!s!: object \"%1!s!\" differs only in case from object \"%2!s!\" in the same scope" 1 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "display_driver.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file display_driver.v" { { "Info" "ISGN_ENTITY_NAME" "1 display_driver " "Info: Found entity 1: display_driver" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 19 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dpram_32x128.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file dpram_32x128.v" { { "Info" "ISGN_ENTITY_NAME" "1 dpram_32x128 " "Info: Found entity 1: dpram_32x128" { } { { "dpram_32x128.v" "" { Text "E:/vga_data_restored/dpram_32x128.v" 39 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "font_ram.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file font_ram.v" { { "Info" "ISGN_ENTITY_NAME" "1 font_ram " "Info: Found entity 1: font_ram" { } { { "font_ram.v" "" { Text "E:/vga_data_restored/font_ram.v" 39 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pll_lcd.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file pll_lcd.v" { { "Info" "ISGN_ENTITY_NAME" "1 pll_lcd " "Info: Found entity 1: pll_lcd" { } { { "pll_lcd.v" "" { Text "E:/vga_data_restored/pll_lcd.v" 39 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Reset_Delay.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Reset_Delay.v" { { "Info" "ISGN_ENTITY_NAME" "1 Reset_Delay " "Info: Found entity 1: Reset_Delay" { } { { "Reset_Delay.v" "" { Text "E:/vga_data_restored/Reset_Delay.v" 1 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "vga_data.v(529) " "Warning (10268): Verilog HDL information at vga_data.v(529): always construct contains both blocking and non-blocking assignments" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 529 0 0 } } } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "vga_data.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file vga_data.v" { { "Info" "ISGN_ENTITY_NAME" "1 vga_data " "Info: Found entity 1: vga_data" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 28 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "clk_1us vga_data.v(247) " "Warning (10236): Verilog HDL Implicit Net warning at vga_data.v(247): created implicit net for \"clk_1us\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 247 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "clk_10us vga_data.v(248) " "Warning (10236): Verilog HDL Implicit Net warning at vga_data.v(248): created implicit net for \"clk_10us\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 248 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "clk_100us vga_data.v(249) " "Warning (10236): Verilog HDL Implicit Net warning at vga_data.v(249): created implicit net for \"clk_100us\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 249 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "clk_1ms vga_data.v(250) " "Warning (10236): Verilog HDL Implicit Net warning at vga_data.v(250): created implicit net for \"clk_1ms\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 250 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "clk_10ms vga_data.v(251) " "Warning (10236): Verilog HDL Implicit Net warning at vga_data.v(251): created implicit net for \"clk_10ms\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 251 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "clk_100ms vga_data.v(252) " "Warning (10236): Verilog HDL Implicit Net warning at vga_data.v(252): created implicit net for \"clk_100ms\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 252 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "clk_1s vga_data.v(253) " "Warning (10236): Verilog HDL Implicit Net warning at vga_data.v(253): created implicit net for \"clk_1s\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 253 0 0 } } } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_TOP" "vga_data " "Info: Elaborating entity \"vga_data\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 vga_data.v(256) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(256): truncated value with size 32 to match size of target (16)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 256 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(261) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(261): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 261 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(262) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(262): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 262 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(263) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(263): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 263 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(268) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(268): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 268 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(274) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(274): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 274 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(277) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(277): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 277 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(281) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(281): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 281 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(285) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(285): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 285 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(289) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(289): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 289 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(293) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(293): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 293 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(297) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(297): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 297 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 vga_data.v(316) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(316): truncated value with size 32 to match size of target (4)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 316 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 12 vga_data.v(422) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(422): truncated value with size 32 to match size of target (12)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 422 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 vga_data.v(496) " "Warning (10230): Verilog HDL assignment warning at vga_data.v(496): truncated value with size 32 to match size of target (2)" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 496 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "display_driver display_driver:vga640x480 " "Info: Elaborating entity \"display_driver\" for hierarchy \"display_driver:vga640x480\"" { } { { "vga_data.v" "vga640x480" { Text "E:/vga_data_restored/vga_data.v" 232 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 5 display_driver.v(101) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(101): truncated value with size 32 to match size of target (5)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 101 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 display_driver.v(162) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(162): truncated value with size 32 to match size of target (10)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 162 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 display_driver.v(167) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(167): truncated value with size 32 to match size of target (10)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 167 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 display_driver.v(181) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(181): truncated value with size 32 to match size of target (11)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 181 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 display_driver.v(191) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(191): truncated value with size 32 to match size of target (2)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 191 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 display_driver.v(192) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(192): truncated value with size 32 to match size of target (2)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 192 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 display_driver.v(193) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(193): truncated value with size 32 to match size of target (2)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 193 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 display_driver.v(233) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(233): truncated value with size 32 to match size of target (6)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 233 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 display_driver.v(240) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(240): truncated value with size 32 to match size of target (6)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 240 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 13 display_driver.v(247) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(247): truncated value with size 32 to match size of target (13)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 247 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 display_driver.v(256) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(256): truncated value with size 32 to match size of target (6)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 256 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 display_driver.v(262) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(262): truncated value with size 32 to match size of target (6)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 262 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 13 display_driver.v(267) " "Warning (10230): Verilog HDL assignment warning at display_driver.v(267): truncated value with size 32 to match size of target (13)" { } { { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 267 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "font_ram display_driver:vga640x480\|font_ram:font5x7 " "Info: Elaborating entity \"font_ram\" for hierarchy \"display_driver:vga640x480\|font_ram:font5x7\"" { } { { "display_driver.v" "font5x7" { Text "E:/vga_data_restored/display_driver.v" 75 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram display_driver:vga640x480\|font_ram:font5x7\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"display_driver:vga640x480\|font_ram:font5x7\|altsyncram:altsyncram_component\"" { } { { "font_ram.v" "altsyncram_component" { Text "E:/vga_data_restored/font_ram.v" 78 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_ELABORATION_HEADER" "display_driver:vga640x480\|font_ram:font5x7\|altsyncram:altsyncram_component " "Info: Elaborated megafunction instantiation \"display_driver:vga640x480\|font_ram:font5x7\|altsyncram:altsyncram_component\"" { } { { "font_ram.v" "" { Text "E:/vga_data_restored/font_ram.v" 78 0 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_TOP" "display_driver:vga640x480\|font_ram:font5x7\|altsyncram:altsyncram_component " "Info: Instantiated megafunction \"display_driver:vga640x480\|font_ram:font5x7\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a NONE " "Info: Parameter \"address_aclr_a\" = \"NONE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_a NONE " "Info: Parameter \"indata_aclr_a\" = \"NONE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file font_rom16.hex " "Info: Parameter \"init_file\" = \"font_rom16.hex\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone " "Info: Parameter \"intended_device_family\" = \"Cyclone\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Info: Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Info: Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 2048 " "Info: Parameter \"numwords_a\" = \"2048\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode SINGLE_PORT " "Info: Parameter \"operation_mode\" = \"SINGLE_PORT\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Info: Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a UNREGISTERED " "Info: Parameter \"outdata_reg_a\" = \"UNREGISTERED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "power_up_uninitialized FALSE " "Info: Parameter \"power_up_uninitialized\" = \"FALSE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 11 " "Info: Parameter \"widthad_a\" = \"11\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 8 " "Info: Parameter \"width_a\" = \"8\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Info: Parameter \"width_byteena_a\" = \"1\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_a NONE " "Info: Parameter \"wrcontrol_aclr_a\" = \"NONE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} } { { "font_ram.v" "" { Text "E:/vga_data_restored/font_ram.v" 78 0 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_bld1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_bld1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_bld1 " "Info: Found entity 1: altsyncram_bld1" { } { { "db/altsyncram_bld1.tdf" "" { Text "E:/vga_data_restored/db/altsyncram_bld1.tdf" 27 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_bld1 display_driver:vga640x480\|font_ram:font5x7\|altsyncram:altsyncram_component\|altsyncram_bld1:auto_generated " "Info: Elaborating entity \"altsyncram_bld1\" for hierarchy \"display_driver:vga640x480\|font_ram:font5x7\|altsyncram:altsyncram_component\|altsyncram_bld1:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "d:/altera/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Warning" "WMIO_MIO_BYTE_HEX_WORD_READ" "font_rom16.hex " "Warning: Byte addressed memory initialization file \"font_rom16.hex\" was read in the word-addressed format" { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 1 -1 0 } } } 0 0 "Byte addressed memory initialization file \"%1!s!\" was read in the word-addressed format" 0 0 "" 0 -1} { "Warning" "WMIO_MIO_HEX_DATA_WRAPPING_HEAD" "font_rom16.hex 256 10 " "Warning: Width of data items in \"font_rom16.hex\" is greater than the memory width. Wrapping data items to subsequent addresses. Found 256 warnings, reporting 10" { { "Warning" "WMIO_MIO_DATA_WRAPPING" "1 font_rom16.hex " "Warning: Data at line (1) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 1 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "2 font_rom16.hex " "Warning: Data at line (2) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 2 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "3 font_rom16.hex " "Warning: Data at line (3) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 3 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "4 font_rom16.hex " "Warning: Data at line (4) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 4 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "5 font_rom16.hex " "Warning: Data at line (5) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 5 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "6 font_rom16.hex " "Warning: Data at line (6) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 6 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "7 font_rom16.hex " "Warning: Data at line (7) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 7 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "8 font_rom16.hex " "Warning: Data at line (8) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 8 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "9 font_rom16.hex " "Warning: Data at line (9) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 9 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "10 font_rom16.hex " "Warning: Data at line (10) of memory initialization file \"font_rom16.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 10 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} } { { "E:/vga_data_restored/font_rom16.hex" "" { Text "E:/vga_data_restored/font_rom16.hex" 1 -1 0 } } } 0 0 "Width of data items in \"%1!s!\" is greater than the memory width. Wrapping data items to subsequent addresses. Found %2!u! warnings, reporting %3!u!" 0 0 "" 0 -1} { "Critical Warning" "WCDB_CDB_MORE_INI_CONTENT" "2048 4096 font_rom16.hex " "Critical Warning: Memory depth (2048) in the design file differs from memory depth (4096) in the Memory Initialization File \"font_rom16.hex\" -- truncated remaining initial content value to fit RAM" { } { { "font_ram.v" "" { Text "E:/vga_data_restored/font_ram.v" 78 0 0 } } } 1 0 "Memory depth (%1!d!) in the design file differs from memory depth (%2!d!) in the Memory Initialization File \"%3!s!\" -- truncated remaining initial content value to fit RAM" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "dpram_32x128 display_driver:vga640x480\|dpram_32x128:dp_ram1 " "Info: Elaborating entity \"dpram_32x128\" for hierarchy \"display_driver:vga640x480\|dpram_32x128:dp_ram1\"" { } { { "display_driver.v" "dp_ram1" { Text "E:/vga_data_restored/display_driver.v" 84 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component\"" { } { { "dpram_32x128.v" "altsyncram_component" { Text "E:/vga_data_restored/dpram_32x128.v" 80 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_ELABORATION_HEADER" "display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component " "Info: Elaborated megafunction instantiation \"display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component\"" { } { { "dpram_32x128.v" "" { Text "E:/vga_data_restored/dpram_32x128.v" 80 0 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_TOP" "display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component " "Info: Instantiated megafunction \"display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a NONE " "Info: Parameter \"address_aclr_a\" = \"NONE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_b NONE " "Info: Parameter \"address_aclr_b\" = \"NONE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_reg_b CLOCK0 " "Info: Parameter \"address_reg_b\" = \"CLOCK0\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_a NONE " "Info: Parameter \"indata_aclr_a\" = \"NONE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file ascii_ram_32x128.hex " "Info: Parameter \"init_file\" = \"ascii_ram_32x128.hex\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone " "Info: Parameter \"intended_device_family\" = \"Cyclone\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Info: Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 4096 " "Info: Parameter \"numwords_a\" = \"4096\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_b 4096 " "Info: Parameter \"numwords_b\" = \"4096\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode DUAL_PORT " "Info: Parameter \"operation_mode\" = \"DUAL_PORT\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_b NONE " "Info: Parameter \"outdata_aclr_b\" = \"NONE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_b UNREGISTERED " "Info: Parameter \"outdata_reg_b\" = \"UNREGISTERED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "power_up_uninitialized FALSE " "Info: Parameter \"power_up_uninitialized\" = \"FALSE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_mixed_ports DONT_CARE " "Info: Parameter \"read_during_write_mode_mixed_ports\" = \"DONT_CARE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 12 " "Info: Parameter \"widthad_a\" = \"12\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_b 12 " "Info: Parameter \"widthad_b\" = \"12\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 8 " "Info: Parameter \"width_a\" = \"8\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_b 8 " "Info: Parameter \"width_b\" = \"8\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Info: Parameter \"width_byteena_a\" = \"1\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_a NONE " "Info: Parameter \"wrcontrol_aclr_a\" = \"NONE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} } { { "dpram_32x128.v" "" { Text "E:/vga_data_restored/dpram_32x128.v" 80 0 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 -1} { "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_1io1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_1io1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_1io1 " "Info: Found entity 1: altsyncram_1io1" { } { { "db/altsyncram_1io1.tdf" "" { Text "E:/vga_data_restored/db/altsyncram_1io1.tdf" 27 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_1io1 display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component\|altsyncram_1io1:auto_generated " "Info: Elaborating entity \"altsyncram_1io1\" for hierarchy \"display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component\|altsyncram_1io1:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "d:/altera/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Warning" "WMIO_MIO_BYTE_HEX_WORD_READ" "ascii_ram_32x128.hex " "Warning: Byte addressed memory initialization file \"ascii_ram_32x128.hex\" was read in the word-addressed format" { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 1 -1 0 } } } 0 0 "Byte addressed memory initialization file \"%1!s!\" was read in the word-addressed format" 0 0 "" 0 -1} { "Warning" "WMIO_MIO_HEX_DATA_WRAPPING_HEAD" "ascii_ram_32x128.hex 259 10 " "Warning: Width of data items in \"ascii_ram_32x128.hex\" is greater than the memory width. Wrapping data items to subsequent addresses. Found 259 warnings, reporting 10" { { "Warning" "WMIO_MIO_DATA_WRAPPING" "1 ascii_ram_32x128.hex " "Warning: Data at line (1) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 1 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "2 ascii_ram_32x128.hex " "Warning: Data at line (2) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 2 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "3 ascii_ram_32x128.hex " "Warning: Data at line (3) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 3 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "4 ascii_ram_32x128.hex " "Warning: Data at line (4) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 4 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "5 ascii_ram_32x128.hex " "Warning: Data at line (5) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 5 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "6 ascii_ram_32x128.hex " "Warning: Data at line (6) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 6 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "7 ascii_ram_32x128.hex " "Warning: Data at line (7) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 7 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "8 ascii_ram_32x128.hex " "Warning: Data at line (8) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 8 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "9 ascii_ram_32x128.hex " "Warning: Data at line (9) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 9 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} { "Warning" "WMIO_MIO_DATA_WRAPPING" "10 ascii_ram_32x128.hex " "Warning: Data at line (10) of memory initialization file \"ascii_ram_32x128.hex\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." { } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 10 -1 0 } } } 0 0 "Data at line (%1!d!) of memory initialization file \"%2!s!\" is too wide to fit in one memory word. Wrapping data to subsequent addresses." 0 0 "" 0 -1} } { { "E:/vga_data_restored/ascii_ram_32x128.hex" "" { Text "E:/vga_data_restored/ascii_ram_32x128.hex" 1 -1 0 } } } 0 0 "Width of data items in \"%1!s!\" is greater than the memory width. Wrapping data items to subsequent addresses. Found %2!u! warnings, reporting %3!u!" 0 0 "" 0 -1} { "Critical Warning" "WCDB_CDB_MORE_INI_CONTENT" "4096 4132 ascii_ram_32x128.hex " "Critical Warning: Memory depth (4096) in the design file differs from memory depth (4132) in the Memory Initialization File \"ascii_ram_32x128.hex\" -- truncated remaining initial content value to fit RAM" { } { { "dpram_32x128.v" "" { Text "E:/vga_data_restored/dpram_32x128.v" 80 0 0 } } } 1 0 "Memory depth (%1!d!) in the design file differs from memory depth (%2!d!) in the Memory Initialization File \"%3!s!\" -- truncated remaining initial content value to fit RAM" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "Reset_Delay Reset_Delay:rst " "Info: Elaborating entity \"Reset_Delay\" for hierarchy \"Reset_Delay:rst\"" { } { { "vga_data.v" "rst" { Text "E:/vga_data_restored/vga_data.v" 237 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 Reset_Delay.v(11) " "Warning (10230): Verilog HDL assignment warning at Reset_Delay.v(11): truncated value with size 32 to match size of target (3)" { } { { "Reset_Delay.v" "" { Text "E:/vga_data_restored/Reset_Delay.v" 11 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 12 Reset_Delay.v(18) " "Warning (10230): Verilog HDL assignment warning at Reset_Delay.v(18): truncated value with size 32 to match size of target (12)" { } { { "Reset_Delay.v" "" { Text "E:/vga_data_restored/Reset_Delay.v" 18 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "pll_lcd pll_lcd:vga_pll " "Info: Elaborating entity \"pll_lcd\" for hierarchy \"pll_lcd:vga_pll\"" { } { { "vga_data.v" "vga_pll" { Text "E:/vga_data_restored/vga_data.v" 242 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll pll_lcd:vga_pll\|altpll:altpll_component " "Info: Elaborating entity \"altpll\" for hierarchy \"pll_lcd:vga_pll\|altpll:altpll_component\"" { } { { "pll_lcd.v" "altpll_component" { Text "E:/vga_data_restored/pll_lcd.v" 88 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_ELABORATION_HEADER" "pll_lcd:vga_pll\|altpll:altpll_component " "Info: Elaborated megafunction instantiation \"pll_lcd:vga_pll\|altpll:altpll_component\"" { } { { "pll_lcd.v" "" { Text "E:/vga_data_restored/pll_lcd.v" 88 0 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_TOP" "pll_lcd:vga_pll\|altpll:altpll_component " "Info: Instantiated megafunction \"pll_lcd:vga_pll\|altpll:altpll_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_divide_by 50 " "Info: Parameter \"clk0_divide_by\" = \"50\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_duty_cycle 50 " "Info: Parameter \"clk0_duty_cycle\" = \"50\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_multiply_by 27 " "Info: Parameter \"clk0_multiply_by\" = \"27\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_phase_shift 0 " "Info: Parameter \"clk0_phase_shift\" = \"0\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "compensate_clock CLK0 " "Info: Parameter \"compensate_clock\" = \"CLK0\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "inclk0_input_frequency 20000 " "Info: Parameter \"inclk0_input_frequency\" = \"20000\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone " "Info: Parameter \"intended_device_family\" = \"Cyclone\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altpll " "Info: Parameter \"lpm_type\" = \"altpll\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode NORMAL " "Info: Parameter \"operation_mode\" = \"NORMAL\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "pll_type AUTO " "Info: Parameter \"pll_type\" = \"AUTO\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_activeclock PORT_UNUSED " "Info: Parameter \"port_activeclock\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_areset PORT_UNUSED " "Info: Parameter \"port_areset\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad0 PORT_UNUSED " "Info: Parameter \"port_clkbad0\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad1 PORT_UNUSED " "Info: Parameter \"port_clkbad1\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkloss PORT_UNUSED " "Info: Parameter \"port_clkloss\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkswitch PORT_UNUSED " "Info: Parameter \"port_clkswitch\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_configupdate PORT_UNUSED " "Info: Parameter \"port_configupdate\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_fbin PORT_UNUSED " "Info: Parameter \"port_fbin\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk0 PORT_USED " "Info: Parameter \"port_inclk0\" = \"PORT_USED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk1 PORT_UNUSED " "Info: Parameter \"port_inclk1\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_locked PORT_UNUSED " "Info: Parameter \"port_locked\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pfdena PORT_UNUSED " "Info: Parameter \"port_pfdena\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasecounterselect PORT_UNUSED " "Info: Parameter \"port_phasecounterselect\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasedone PORT_UNUSED " "Info: Parameter \"port_phasedone\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasestep PORT_UNUSED " "Info: Parameter \"port_phasestep\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phaseupdown PORT_UNUSED " "Info: Parameter \"port_phaseupdown\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pllena PORT_UNUSED " "Info: Parameter \"port_pllena\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanaclr PORT_UNUSED " "Info: Parameter \"port_scanaclr\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclk PORT_UNUSED " "Info: Parameter \"port_scanclk\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclkena PORT_UNUSED " "Info: Parameter \"port_scanclkena\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandata PORT_UNUSED " "Info: Parameter \"port_scandata\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandataout PORT_UNUSED " "Info: Parameter \"port_scandataout\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandone PORT_UNUSED " "Info: Parameter \"port_scandone\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanread PORT_UNUSED " "Info: Parameter \"port_scanread\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanwrite PORT_UNUSED " "Info: Parameter \"port_scanwrite\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk0 PORT_USED " "Info: Parameter \"port_clk0\" = \"PORT_USED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk1 PORT_UNUSED " "Info: Parameter \"port_clk1\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk3 PORT_UNUSED " "Info: Parameter \"port_clk3\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk4 PORT_UNUSED " "Info: Parameter \"port_clk4\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk5 PORT_UNUSED " "Info: Parameter \"port_clk5\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena0 PORT_UNUSED " "Info: Parameter \"port_clkena0\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena1 PORT_UNUSED " "Info: Parameter \"port_clkena1\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena3 PORT_UNUSED " "Info: Parameter \"port_clkena3\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena4 PORT_UNUSED " "Info: Parameter \"port_clkena4\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena5 PORT_UNUSED " "Info: Parameter \"port_clkena5\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk0 PORT_UNUSED " "Info: Parameter \"port_extclk0\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk1 PORT_UNUSED " "Info: Parameter \"port_extclk1\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk2 PORT_UNUSED " "Info: Parameter \"port_extclk2\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk3 PORT_UNUSED " "Info: Parameter \"port_extclk3\" = \"PORT_UNUSED\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 -1} } { { "pll_lcd.v" "" { Text "E:/vga_data_restored/pll_lcd.v" 88 0 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 -1} { "Info" "ISGN_START_ELABORATION_HIERARCHY" "clock_module clock_module:sys_clocks " "Info: Elaborating entity \"clock_module\" for hierarchy \"clock_module:sys_clocks\"" { } { { "vga_data.v" "sys_clocks" { Text "E:/vga_data_restored/vga_data.v" 254 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 clock_module.v(46) " "Warning (10230): Verilog HDL assignment warning at clock_module.v(46): truncated value with size 32 to match size of target (6)" { } { { "clock_module.v" "" { Text "E:/vga_data_restored/clock_module.v" 46 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 9 clock_module.v(58) " "Warning (10230): Verilog HDL assignment warning at clock_module.v(58): truncated value with size 32 to match size of target (9)" { } { { "clock_module.v" "" { Text "E:/vga_data_restored/clock_module.v" 58 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 13 clock_module.v(70) " "Warning (10230): Verilog HDL assignment warning at clock_module.v(70): truncated value with size 32 to match size of target (13)" { } { { "clock_module.v" "" { Text "E:/vga_data_restored/clock_module.v" 70 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 clock_module.v(82) " "Warning (10230): Verilog HDL assignment warning at clock_module.v(82): truncated value with size 32 to match size of target (7)" { } { { "clock_module.v" "" { Text "E:/vga_data_restored/clock_module.v" 82 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 clock_module.v(94) " "Warning (10230): Verilog HDL assignment warning at clock_module.v(94): truncated value with size 32 to match size of target (10)" { } { { "clock_module.v" "" { Text "E:/vga_data_restored/clock_module.v" 94 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 14 clock_module.v(106) " "Warning (10230): Verilog HDL assignment warning at clock_module.v(106): truncated value with size 32 to match size of target (14)" { } { { "clock_module.v" "" { Text "E:/vga_data_restored/clock_module.v" 106 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 7 clock_module.v(118) " "Warning (10230): Verilog HDL assignment warning at clock_module.v(118): truncated value with size 32 to match size of target (7)" { } { { "clock_module.v" "" { Text "E:/vga_data_restored/clock_module.v" 118 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 -1} { "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_HDR" "" "Warning: Synthesized away the following node(s):" { { "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_SUB_HDR" "RAM " "Warning: Synthesized away the following RAM node(s):" { { "Warning" "WCDB_SGATE_CDB_SGATE_SWEPT_NODE" "display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component\|altsyncram_1io1:auto_generated\|q_b\[7\] " "Warning (14320): Synthesized away node \"display_driver:vga640x480\|dpram_32x128:dp_ram1\|altsyncram:altsyncram_component\|altsyncram_1io1:auto_generated\|q_b\[7\]\"" { } { { "db/altsyncram_1io1.tdf" "" { Text "E:/vga_data_restored/db/altsyncram_1io1.tdf" 268 2 0 } } { "altsyncram.tdf" "" { Text "d:/altera/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } } { "dpram_32x128.v" "" { Text "E:/vga_data_restored/dpram_32x128.v" 80 0 0 } } { "display_driver.v" "" { Text "E:/vga_data_restored/display_driver.v" 84 0 0 } } { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 232 0 0 } } } 0 14320 "Synthesized away node \"%1!s!\"" 0 0 "" 0 -1} } { } 0 0 "Synthesized away the following %1!s! node(s):" 0 0 "" 0 -1} } { } 0 0 "Synthesized away the following node(s):" 0 0 "" 0 -1} { "Warning" "WSGN_CONNECTIVITY_WARNINGS" "1 " "Warning: 1 hierarchies have connectivity warnings - see the Connectivity Checks report folder" { } { } 0 0 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "CON1 GND " "Warning (13410): Pin \"CON1\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 55 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON2 GND " "Warning (13410): Pin \"CON2\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 56 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON3 GND " "Warning (13410): Pin \"CON3\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 57 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON4 GND " "Warning (13410): Pin \"CON4\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 58 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON5 GND " "Warning (13410): Pin \"CON5\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 59 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON6 GND " "Warning (13410): Pin \"CON6\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 60 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON7 GND " "Warning (13410): Pin \"CON7\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 61 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON8 GND " "Warning (13410): Pin \"CON8\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 62 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON9 GND " "Warning (13410): Pin \"CON9\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 63 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON10 GND " "Warning (13410): Pin \"CON10\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 64 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON11 GND " "Warning (13410): Pin \"CON11\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 65 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON12 GND " "Warning (13410): Pin \"CON12\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 66 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON13 GND " "Warning (13410): Pin \"CON13\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 67 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON14 GND " "Warning (13410): Pin \"CON14\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 68 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON15 GND " "Warning (13410): Pin \"CON15\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 69 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON16 GND " "Warning (13410): Pin \"CON16\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 70 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON17 GND " "Warning (13410): Pin \"CON17\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 71 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON18 GND " "Warning (13410): Pin \"CON18\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 72 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON19 GND " "Warning (13410): Pin \"CON19\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 73 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CON20 GND " "Warning (13410): Pin \"CON20\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 74 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "TXD VCC " "Warning (13410): Pin \"TXD\" is stuck at VCC" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 78 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "CS_FLASH VCC " "Warning (13410): Pin \"CS_FLASH\" is stuck at VCC" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 79 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "SCK GND " "Warning (13410): Pin \"SCK\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 96 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDA VCC " "Warning (13410): Pin \"LEDA\" is stuck at VCC" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 97 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "LEDB VCC " "Warning (13410): Pin \"LEDB\" is stuck at VCC" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 98 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "MSB_B GND " "Warning (13410): Pin \"MSB_B\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 108 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} { "Warning" "WOPT_MLS_STUCK_PIN" "DP GND " "Warning (13410): Pin \"DP\" is stuck at GND" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 116 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "" 0 -1} } { } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "14 14 " "Info: 14 registers lost all their fanouts during netlist optimizations. The first 14 are displayed below." { { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "display_driver:vga640x480\|char_reg\[7\] " "Info: Register \"display_driver:vga640x480\|char_reg\[7\]\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ram_data\[7\] " "Info: Register \"ram_data\[7\]\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ascii_reg\[7\] " "Info: Register \"ascii_reg\[7\]\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "wr_state~16 " "Info: Register \"wr_state~16\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "wr_state~17 " "Info: Register \"wr_state~17\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ram_state~90 " "Info: Register \"ram_state~90\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ram_state~91 " "Info: Register \"ram_state~91\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ram_state~92 " "Info: Register \"ram_state~92\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "ram_state~93 " "Info: Register \"ram_state~93\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "display_driver:vga640x480\|h_state~26 " "Info: Register \"display_driver:vga640x480\|h_state~26\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "display_driver:vga640x480\|h_state~27 " "Info: Register \"display_driver:vga640x480\|h_state~27\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "display_driver:vga640x480\|zone.ZONE_IMAGE " "Info: Register \"display_driver:vga640x480\|zone.ZONE_IMAGE\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "display_driver:vga640x480\|zone.ZONE_ZWART " "Info: Register \"display_driver:vga640x480\|zone.ZONE_ZWART\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} { "Info" "ISCL_SCL_LOST_FANOUT_MSG_SUB" "display_driver:vga640x480\|char_pnt\[12\] " "Info: Register \"display_driver:vga640x480\|char_pnt\[12\]\" lost all its fanouts during netlist optimizations." { } { } 0 0 "Register \"%1!s!\" lost all its fanouts during netlist optimizations." 0 0 "" 0 -1} } { } 0 0 "%1!d! registers lost all their fanouts during netlist optimizations. The first %2!d! are displayed below." 0 0 "" 0 -1} { "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "E:/vga_data_restored/vga_data.map.smsg " "Info: Generated suppressed messages file E:/vga_data_restored/vga_data.map.smsg" { } { } 0 0 "Generated suppressed messages file %1!s!" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "21 " "Warning: Design contains 21 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "OSCO " "Warning (15610): No output dependent on input pin \"OSCO\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 31 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "RXD " "Warning (15610): No output dependent on input pin \"RXD\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 32 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "RTS " "Warning (15610): No output dependent on input pin \"RTS\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 33 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "CTS " "Warning (15610): No output dependent on input pin \"CTS\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 34 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DSR " "Warning (15610): No output dependent on input pin \"DSR\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 35 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DTR " "Warning (15610): No output dependent on input pin \"DTR\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 36 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DCD " "Warning (15610): No output dependent on input pin \"DCD\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 37 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "RI " "Warning (15610): No output dependent on input pin \"RI\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 38 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DS1 " "Warning (15610): No output dependent on input pin \"DS1\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 39 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DS2 " "Warning (15610): No output dependent on input pin \"DS2\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 40 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DS3 " "Warning (15610): No output dependent on input pin \"DS3\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 41 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DS4 " "Warning (15610): No output dependent on input pin \"DS4\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 42 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DS5 " "Warning (15610): No output dependent on input pin \"DS5\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 43 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DS6 " "Warning (15610): No output dependent on input pin \"DS6\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 44 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DS7 " "Warning (15610): No output dependent on input pin \"DS7\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 45 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DS8 " "Warning (15610): No output dependent on input pin \"DS8\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 46 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "PS2_DATA " "Warning (15610): No output dependent on input pin \"PS2_DATA\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 53 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "PS2_CLK " "Warning (15610): No output dependent on input pin \"PS2_CLK\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 54 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DI " "Warning (15610): No output dependent on input pin \"DI\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 75 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DO " "Warning (15610): No output dependent on input pin \"DO\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 76 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "TSOP " "Warning (15610): No output dependent on input pin \"TSOP\"" { } { { "vga_data.v" "" { Text "E:/vga_data_restored/vga_data.v" 77 -1 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0 -1} } { } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_SUMMARY" "720 " "Info: Implemented 720 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "28 " "Info: Implemented 28 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_OPINS" "61 " "Info: Implemented 61 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_LCELLS" "615 " "Info: Implemented 615 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_RAMS" "15 " "Info: Implemented 15 RAM segments" { } { } 0 0 "Implemented %1!d! RAM segments" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_PLLS" "1 " "Info: Implemented 1 ClockLock PLLs" { } { } 0 0 "Implemented %1!d! ClockLock PLLs" 0 0 "" 0 -1} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1} { "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 124 s Quartus II 64-Bit " "Info: Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 124 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "265 " "Info: Peak virtual memory: 265 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Sat May 09 04:57:35 2009 " "Info: Processing ended: Sat May 09 04:57:35 2009" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:17 " "Info: Elapsed time: 00:00:17" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Info: Total CPU time (on all processors): 00:00:05" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}