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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 10.093 ns
From           : KEY[0]
To             : ascii_reg[1]
From Clock     : --
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 10.902 ns
From           : leddisp_reg[14]
To             : LEDR[6]
From Clock     : CLOCK_50
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 1.915 ns
From           : SW[0]
To             : digitb[3]
From Clock     : --
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Clock Setup: 'pll_lcd:vga_pll|altpll:altpll_component|_clk0'
Slack          : -4.602 ns
Required Time  : 27.00 MHz ( period = 37.037 ns )
Actual Time    : N/A
From           : leddisp_reg[11]
To             : led_reg[11]
From Clock     : CLOCK_50
To Clock       : pll_lcd:vga_pll|altpll:altpll_component|_clk0
Failed Paths   : 42

Type           : Clock Setup: 'CLOCK_50'
Slack          : 12.060 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : 125.94 MHz ( period = 7.940 ns )
From           : clock_module:sys_clocks|clk_10ms_reg
To             : clock_module:sys_clocks|clk_10ms
From Clock     : CLOCK_50
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Clock Hold: 'pll_lcd:vga_pll|altpll:altpll_component|_clk0'
Slack          : 0.445 ns
Required Time  : 27.00 MHz ( period = 37.037 ns )
Actual Time    : N/A
From           : display_driver:vga640x480|h_dot_reg[0]
To             : display_driver:vga640x480|h_dot_reg[0]
From Clock     : pll_lcd:vga_pll|altpll:altpll_component|_clk0
To Clock       : pll_lcd:vga_pll|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'CLOCK_50'
Slack          : 0.445 ns
Required Time  : 50.00 MHz ( period = 20.000 ns )
Actual Time    : N/A
From           : clock_module:sys_clocks|clk_1s_reg
To             : clock_module:sys_clocks|clk_1s_reg
From Clock     : CLOCK_50
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 42

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