module debounce (pb, clk_100Hz, pb_debounced);
   input    pb;
   input    clk_100Hz;
   output   pb_debounced;
   reg 	    pb_debounced;

   reg [3:0] shift_pb;
   
   always @ (posedge clk_100Hz) begin
      shift_pb [3:0] <= {shift_pb [2:0], pb};
      if (shift_pb == 4'b1111) pb_debounced <= 1;
      else pb_debounced <= 0;
   end

endmodule // debounce