--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone II" LPM_SIZE=4 LPM_WIDTH=8 LPM_WIDTHS=2 data result sel --VERSION_BEGIN 9.0 cbx_lpm_mux 2008:05:19:10:30:36:SJ cbx_mgl 2009:01:29:16:12:07:SJ VERSION_END -- Copyright (C) 1991-2009 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any output files from any of the foregoing -- (including device programming or simulation files), and any -- associated documentation or information are expressly subject -- to the terms and conditions of the Altera Program License -- Subscription Agreement, Altera MegaCore Function License -- Agreement, or other applicable license agreement, including, -- without limitation, that your use is for the sole purpose of -- programming logic devices manufactured by Altera and sold by -- Altera or its authorized distributors. Please refer to the -- applicable agreement for further details. --synthesis_resources = lut 16 SUBDESIGN mux_kib ( data[31..0] : input; result[7..0] : output; sel[1..0] : input; ) VARIABLE result_node[7..0] : WIRE; sel_node[1..0] : WIRE; w_data482w[3..0] : WIRE; w_data512w[3..0] : WIRE; w_data537w[3..0] : WIRE; w_data562w[3..0] : WIRE; w_data587w[3..0] : WIRE; w_data612w[3..0] : WIRE; w_data637w[3..0] : WIRE; w_data662w[3..0] : WIRE; BEGIN result[] = result_node[]; result_node[] = ( (((w_data662w[1..1] & sel_node[0..0]) & (! (((w_data662w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data662w[2..2]))))) # ((((w_data662w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data662w[2..2]))) & (w_data662w[3..3] # (! sel_node[0..0])))), (((w_data637w[1..1] & sel_node[0..0]) & (! (((w_data637w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data637w[2..2]))))) # ((((w_data637w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data637w[2..2]))) & (w_data637w[3..3] # (! sel_node[0..0])))), (((w_data612w[1..1] & sel_node[0..0]) & (! (((w_data612w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data612w[2..2]))))) # ((((w_data612w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data612w[2..2]))) & (w_data612w[3..3] # (! sel_node[0..0])))), (((w_data587w[1..1] & sel_node[0..0]) & (! (((w_data587w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data587w[2..2]))))) # ((((w_data587w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data587w[2..2]))) & (w_data587w[3..3] # (! sel_node[0..0])))), (((w_data562w[1..1] & sel_node[0..0]) & (! (((w_data562w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data562w[2..2]))))) # ((((w_data562w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data562w[2..2]))) & (w_data562w[3..3] # (! sel_node[0..0])))), (((w_data537w[1..1] & sel_node[0..0]) & (! (((w_data537w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data537w[2..2]))))) # ((((w_data537w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data537w[2..2]))) & (w_data537w[3..3] # (! sel_node[0..0])))), (((w_data512w[1..1] & sel_node[0..0]) & (! (((w_data512w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data512w[2..2]))))) # ((((w_data512w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data512w[2..2]))) & (w_data512w[3..3] # (! sel_node[0..0])))), (((w_data482w[1..1] & sel_node[0..0]) & (! (((w_data482w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data482w[2..2]))))) # ((((w_data482w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data482w[2..2]))) & (w_data482w[3..3] # (! sel_node[0..0]))))); sel_node[] = ( sel[1..0]); w_data482w[] = ( data[24..24], data[16..16], data[8..8], data[0..0]); w_data512w[] = ( data[25..25], data[17..17], data[9..9], data[1..1]); w_data537w[] = ( data[26..26], data[18..18], data[10..10], data[2..2]); w_data562w[] = ( data[27..27], data[19..19], data[11..11], data[3..3]); w_data587w[] = ( data[28..28], data[20..20], data[12..12], data[4..4]); w_data612w[] = ( data[29..29], data[21..21], data[13..13], data[5..5]); w_data637w[] = ( data[30..30], data[22..22], data[14..14], data[6..6]); w_data662w[] = ( data[31..31], data[23..23], data[15..15], data[7..7]); END; --VALID FILE