gccDppConsole Test C++ SDK
1.0.0.0
DPP C++ Console Demonstration
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00001 00003 #pragma once 00004 #include <stdio.h> 00005 #include <stdlib.h> 00006 #include "DP5Protocol.h" 00007 #include "DppUtilities.h" 00008 00009 typedef enum _PX5_OPTIONS 00010 { 00011 PX5_OPTION_NONE=0, 00012 PX5_OPTION_HPGe_HVPS=1, 00013 PX5_OPTION_TEST_TEK=4, 00014 PX5_OPTION_TEST_MOX=5, 00015 PX5_OPTION_TEST_AMP=6, 00016 PX5_OPTION_TEST_MODE_1=8, 00017 PX5_OPTION_TEST_MODE_2=9 00018 } PX5_OPTIONS; 00019 00020 //PX5_OPTION_TEST_MODE_1 reserved for future use 00021 //PX5_OPTION_TEST_MODE_2 reserved for future use 00022 00023 typedef struct DP5_DP4_FORMAT_STATUS 00024 { 00025 unsigned char RAW[64]; 00026 unsigned long SerialNumber; 00027 double FastCount; 00028 double SlowCount; 00029 unsigned char FPGA; 00030 unsigned char Firmware; 00031 unsigned char Build; 00032 double AccumulationTime; 00033 double RealTime; 00034 double LiveTime; 00035 double HV; 00036 double DET_TEMP; 00037 double DP5_TEMP; 00038 bool PX4; 00039 bool AFAST_LOCKED; 00040 bool MCA_EN; 00041 bool PRECNT_REACHED; 00042 bool PresetRtDone; 00043 bool PresetLtDone; 00044 bool SUPPLIES_ON; 00045 bool SCOPE_DR; 00046 bool DP5_CONFIGURED; 00047 double GP_COUNTER; 00048 bool AOFFSET_LOCKED; 00049 bool MCS_DONE; 00050 bool RAM_TEST_RUN; 00051 bool RAM_TEST_ERROR; 00052 double DCAL; 00053 unsigned char PZCORR; // or single? 00054 unsigned char UC_TEMP_OFFSET; 00055 double AN_IN; 00056 double VREF_IN; 00057 unsigned long PC5_SN; 00058 bool PC5_PRESENT; 00059 bool PC5_HV_POL; 00060 bool PC5_8_5V; 00061 double LIVETIME; 00062 double ADC_GAIN_CAL; 00063 unsigned char ADC_OFFSET_CAL; 00064 long SPECTRUM_OFFSET; // or single? 00065 bool b80MHzMode; 00066 bool bFPGAAutoClock; 00067 unsigned char DEVICE_ID; 00068 bool ReBootFlag; 00069 unsigned char DPP_options; 00070 bool HPGe_HV_INH; 00071 bool HPGe_HV_INH_POL; 00072 double TEC_Voltage; 00073 unsigned char DPP_ECO; 00074 bool AU34_2; 00075 bool isAscInstalled; 00076 bool isAscEnabled; 00077 } DP4_FORMAT_STATUS, *PDP4_FORMAT_STATUS; 00078 00079 typedef struct _DiagDataType 00080 { 00081 float ADC_V[11]; 00082 float PC5_V[3]; 00083 bool PC5_PRESENT; 00084 long PC5_SN; 00085 unsigned char Firmware; 00086 unsigned char FPGA; 00087 bool SRAMTestPass; 00088 long SRAMTestData; 00089 int TempOffset; 00090 string strTempRaw; 00091 string strTempCal; 00092 bool PC5Initialized; 00093 float PC5DCAL; 00094 bool IsPosHV; 00095 bool Is8_5VPreAmp; 00096 bool Sup9VOn; 00097 bool PreAmpON; 00098 bool HVOn; 00099 bool TECOn; 00100 unsigned char DiagData[192]; 00101 } DiagDataType, *PDDiagDataType; 00102 00103 class CDP5Status 00104 { 00105 public: 00106 CDP5Status(void); 00107 ~CDP5Status(void); 00108 00110 CDppUtilities DppUtil; 00111 00113 DP4_FORMAT_STATUS m_DP5_Status; 00115 DiagDataType DiagData; 00117 void Process_Status(DP4_FORMAT_STATUS *m_DP5_Status); 00119 string ShowStatusValueStrings(DP4_FORMAT_STATUS m_DP5_Status); 00120 string PX5_OptionsString(DP4_FORMAT_STATUS m_DP5_Status); 00121 string GetStatusValueStrings(DP4_FORMAT_STATUS m_DP5_Status); 00122 00124 void Process_Diagnostics(Packet_In PIN, DiagDataType *dd, int device_type); 00126 string DiagnosticsToString(DiagDataType dd, int device_type); 00128 string DiagStrPX5Option(DiagDataType dd, int device_type); 00129 00131 string FmtHvPwr(float fVal); 00133 string FmtPc5Pwr(float fVal); 00135 string FmtPc5Temp(float fVal) ; 00137 string FmtHex(long FmtHex, long HexDig); 00139 string FmtLng(long lVal); 00141 string VersionToStr(unsigned char bVersion); 00143 string OnOffStr(bool bOn); 00145 string IsAorB(bool bIsA, string strA, string strB); 00147 string GetDeviceNameFromVal(int DeviceTypeVal) ; 00149 string DisplayBufferArray(unsigned char buffer[], unsigned long bufSizeIn); 00151 void SaveStringDataToFile(string strData); 00152 00153 }; 00154 00155 00156 00157 00158 00159 00160 00161 00162 00163 00164 00165 00166 00167 00168 00169 00170 00171 00172 00173