; Orange programmer module v3.2
; (c) 2001 Alex Plusov / CnC Lab
; CHIP=X24325 (4Kx8) Xicor

; with Write Protect Register WPR (Addr = FFFh)
; 7     6   5   4   3    2     1   0
; WPEN  0   0  BP1 BP0  RWEL  WEL  0
; Внимание: При random read/write 0xFFF доступ к Protect Register
; при sequential - доступ к памяти 

; test version

SOCKET=1 ;"I2C"

PING=SCL,0
PING=SDA,1
PINO=WP, 2
PINO=S0, 3
PINO=S1, 4
PINO=S2, 5


CDELAY=4                              ; one cycle time
R9=PROTECT,C8,WPEN,x,x,BP1,BP0,RWEL,WEL,0


[_START]
SDA=1,SCL=1,SDA=0,SCL=0               ; Start  10

[_STOP]
SDA=0,SCL=1,SDA=1,SCL=0               ; Stop   01


; R1 - DATA, not 0xFFF check
[_READB]
_START
R0=101B
LOOP=(2,0) {SDA=R0[I],SCL=1,SCL=0}    ; out 3 bits DeviceAdr
LOOP=(11,8){SDA=ADR[I],SCL=1,SCL=0}   ; out 4 bits Hi(Adr)
SDA=0,SCL=1,SCL=0                     ; out 1 bit, 0=Write Mode
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN check
                                      ; end  out  DeviceAdr, Hi(Adr), Mode

LOOP=(7,0) {SDA=ADR[I],SCL=1,SCL=0}   ; out 8 bits Lo(Adr)
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN check
                                      ; end  out   Lo(Adr)

_START
R0=101B
LOOP=(2,0) {SDA=R0[I],SCL=1,SCL=0}    ; out 3 bits DeviceAdr
LOOP=(11,8) {SDA=ADR[I],SCL=1,SCL=0}  ; out 4 bits Hi(Adr)
SDA=1,SCL=1,SCL=0                     ; out 1 bit, 1=Read Mode
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN  check
                                      ; end  out  DeviceSelect
R1=0
LOOP=(7,0) {SCL=1,R1[I]=SDA,SCL=0}  ; read byte Data
SDA=1,SCL=1,SCL=0                     ; out  master  NO_ACKN

_STOP



; R1 - data  not 0xFFF check
[_WRITEB]
_START
R0=101B
LOOP=(2,0) {SDA=R0[I],SCL=1,SCL=0}    ; out 3 bits DeviceAdr
LOOP=(11,8) {SDA=ADR[I],SCL=1,SCL=0}  ; out 4 bits Hi(Adr)
SDA=0,SCL=1,SCL=0                     ; out 1 bit, 0=Write Mode
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN check
                                      ; end  out DeviceAdr, Hi(Adr), Mode

LOOP=(7,0) {SDA=ADR[I],SCL=1,SCL=0}   ; out 8 bits Lo(Adr)
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN check
                                      ; end  out   Lo(Adr)

LOOP=(7,0) {SDA=R1[I],SCL=1,SCL=0}  ; out byte Data
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN  check
                                      ; end out Data
_STOP



[INIT]
S0=0,S1=0,S2=0
WP=1 ; write disable

[READ]
R2=ADR
R2?0xFFF{R2=0xFFE} ; last address read only sequential

_START
R0=101B
LOOP=(2,0) {SDA=R0[I],SCL=1,SCL=0}    ; out 3 bits DeviceAdr
LOOP=(11,8){SDA=R2[I],SCL=1,SCL=0}   ; out 4 bits Hi(Adr)
SDA=0,SCL=1,SCL=0                     ; out 1 bit, 0=Write Mode
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN check
                                      ; end  out  DeviceAdr, Hi(Adr), Mode

LOOP=(7,0) {SDA=R2[I],SCL=1,SCL=0}   ; out 8 bits Lo(Adr)
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN check
                                      ; end  out   Lo(Adr)

_START
R0=101B
LOOP=(2,0) {SDA=R0[I],SCL=1,SCL=0}    ; out 3 bits DeviceAdr
LOOP=(11,8) {SDA=ADR[I],SCL=1,SCL=0}  ; out 4 bits Hi(Adr)
SDA=1,SCL=1,SCL=0                     ; out 1 bit, 1=Read Mode
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN  check
                                      ; end  out  DeviceSelect

R2=ADR
R2?0xFFF{
LOOP=(7,0) {SCL=1,P=2,SCL=0}          ; read imitation 
SDA=0,SCL=1,SCL=0                     ; out  master  CKN
SDA=1
}  

LOOP=(7,0) {SCL=1,DATA[I]=SDA,SCL=0}  ; read byte Data
SDA=1,SCL=1,SCL=0                     ; out  master  NO_ACKN

_STOP



[WRITEINIT]
WP=0 ;write enabe
P=10
; Clear protection:
ADR=0xFFF,R1=0000010B,_WRITEB ;Set WEL = 1
ADR=0xFFF,R1=0000110B,_WRITEB ;Set RWEL = 1
ADR=0xFFF,R1=0000010B,_WRITEB ;Set RWEL = 0 , BP - clear!
P=10000                               ; delay: (Write Time)


[WRITE]
R2=ADR
; we read and store data from 0xFFE:
R2?0xFFF{ADR=0xFFE,_READB,R2=0xFFE,ADR=0xFFF} ; last address write only sequential


_START
R0=101B
LOOP=(2,0) {SDA=R0[I],SCL=1,SCL=0}    ; out 3 bits DeviceAdr
LOOP=(11,8) {SDA=R2[I],SCL=1,SCL=0}  ; out 4 bits Hi(Adr)
SDA=0,SCL=1,SCL=0                     ; out 1 bit, 0=Write Mode
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN check
                                      ; end  out DeviceAdr, Hi(Adr), Mode

LOOP=(7,0) {SDA=R2[I],SCL=1,SCL=0}   ; out 8 bits Lo(Adr)
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN check
                                      ; end  out   Lo(Adr)

R2=ADR
R2?0xFFF{             ; last address write only sequential
LOOP=(7,0) {SDA=R1[I],SCL=1,SCL=0}  ; out byte Data 0xFFE
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN  check
}

LOOP=(7,0) {SDA=DATA[I],SCL=1,SCL=0}  ; out byte Data
SDA=1,SCL=1,SDA?0,SCL=0               ; ACKN  check
                                      ; end out Data

_STOP

P=10000                               ; delay: (Write Time)




[ReadProtect]
ADR=0xFFF,_READB
R9=R1
GET=("Register",R9)

[WriteProtect]
WP=0 ;write enabe
GET=("Write Register",R9)
RA?0{EXIT}
R9=&00011000B
R9=|00000010B ;WEL=1
ADR=0xFFF,R1=0000010B,_WRITEB ;Set WEL = 1
ADR=0xFFF,R1=0000110B,_WRITEB ;Set RWEL = 1
ADR=0xFFF,R1=R9,_WRITEB ;Set WPEN and BP1,BP0
P=10000                               ; delay: (Write Time)
ADR=0xFFF,_READB
R9=R1
GET=("Register",R9)


[WriteEnable]
WP=0 ;write enabe
ADR=0xFFF,R1=0000010B,_WRITEB ;Set WEL = 1
ADR=0xFFF,R1=0000110B,_WRITEB ;Set RWEL = 1
ADR=0xFFF,R1=0000010B,_WRITEB ;Set RWEL = 0
P=10000                               ; delay: (Write Time)