; Orange programmer module v2.3 ; (c) 1999-2004 CnCLab ;CHIP=uPD6253,256,uPD6254.hpl ;CHIP=uPD6254,512,uPD6254.hpl ; tested uPD6254 SOCKET=1 ;"I2C" PING=SCL,0 PING=SDA,1 PINO=WP, 2 PINO=A0, 3 PINO=A1, 4 PINO=A2, 5 CDELAY=4 ; one cycle time [_START] SDA=1,SCL=1,SDA=0,SCL=0 ; Start 10 [_STOP] SCL=0,SDA=0,SCL=1,SDA=1 ; Stop 01 [_PWAIT] ; polling wait R0=0 R1=0xA0 LOOP=(0,60){ _START LOOP=(7,0) {SDA=R1[I],SCL=1,SCL=0} ; out 8 bits SDA=1,SCL=1,R0[0]=SDA ; ack store SCL=0,SDA=0 _STOP R0?0{BREAK} P=500 } [INIT] A0=0,A1=0,A2=0 WP=1 [READ] _START R0=0xA LOOP=(3,0) {SDA=R0[I],SCL=1,SCL=0} ; out 4 bits DeviceAdr LOOP=(10,8){SDA=ADR[I],SCL=1,SCL=0} ; out 3 bits Hi(Adr) SDA=0,SCL=1,SCL=0 ; out 1 bit, 0=Write Mode SDA=1,SCL=1,SDA?0,SCL=0 ; ACKN check ; end out DeviceAdr, Hi(Adr), Mode LOOP=(7,0) {SDA=ADR[I],SCL=1,SCL=0} ; out 8 bits Lo(Adr) SDA=1,SCL=1,SDA?0,SCL=0 ; ACKN check ; end out Lo(Adr) _START R0=0xA LOOP=(3,0) {SDA=R0[I],SCL=1,SCL=0} ; out 4 bits DeviceAdr LOOP=(10,8) {SDA=ADR[I],SCL=1,SCL=0} ; out 3 bits Hi(Adr) SDA=1,SCL=1,SCL=0 ; out 1 bit, 1=Read Mode SDA=1,SCL=1,SDA?0,SCL=0 ; ACKN check ; end out DeviceSelect LOOP=(7,0) {SCL=1,DATA[I]=SDA,SCL=0} ; read byte Data SDA=1,SCL=1,SCL=0 ; out master NO_ACKN _STOP [WRITE] _START R0=0xA LOOP=(3,0) {SDA=R0[I],SCL=1,SCL=0} ; out 4 bits DeviceAdr LOOP=(10,8) {SDA=ADR[I],SCL=1,SCL=0} ; out 3 bits Hi(Adr) SDA=0,SCL=1,SCL=0 ; out 1 bit, 0=Write Mode SDA=1,SCL=1,SDA?0,SCL=0 ; ACKN check ; end out DeviceAdr, Hi(Adr), Mode LOOP=(7,0) {SDA=ADR[I],SCL=1,SCL=0} ; out 8 bits Lo(Adr) SDA=1,SCL=1,SDA?0,SCL=0 ; ACKN check ; end out Lo(Adr) LOOP=(7,0) {SDA=DATA[I],SCL=1,SCL=0} ; out byte Data SDA=1,SCL=1,SDA?0,SCL=0 ; ACKN check ; end out Data _STOP P=50000 ; delay: (Write Time) _PWAIT