; Orange programmer module v2.5
; (c) 2011 CnCLab & pavel-pervomaysk
;ST
;CHIP=M95M01-R,128K(128),m95m02.hpl
;CHIP=M95M02-DR,256K(128),m95m02.hpl

; Tested Chips: ST  M95M01-R 


SOCKET=4 ;"SPI"

PINO=SCK,0
PINO=SI,1
PINO=CS,2
PINO=WP,3
PINO=HOLD,4
PINI=SO,1

CDELAY=1 ; one set delay 

R9=STATUS,C8,SRWD,x,x,x,BP1,BP0,WEL,WIP



[_ERR]
PRINT=E("Chip not respond     "),EXIT

[_SEND]
LOOP=(7,0){SI=R0[I],SCK=P}

[_WAITWR]	   ;Wait for end write memory...
SCK=0
LOOP=(0,5000){
CS=0
_SEND(0x05)        ;RDSR
SI=1
R9=0
LOOP=(7,0){SCK=1,R9[I]=SO,SCK=0}
CS=1
R9[0]?0{BREAK}     ;WIP bit
P=10
}
R9[0]?1{_ERR}


[_CHECKST]	   ;READ STATUS REGISTER...
SCK=0
CS=0
_SEND(0x05)        ;RDSR
SI=1
R9=0
LOOP=(7,0){SCK=1,R9[I]=SO,SCK=0}
CS=1
R9[0]?1{_ERR}      ; если статус != 00 то выводим ошибку



[!#SETUP]
$WDELAY=10000


[INIT]
HOLD=1
WP=0
CS=1
SCK=0

_CHECKST              ; проверяем наличие чипа 

[READ]
CS=1
SCK=0
CS=0
_SEND(00000011b)     ;Read
LOOP=(23,0){SI=ADR[I],SCK=P}
SI=1
LOOP=(7,0){SCK=1,DATA[I]=SO,SCK=0}
CS=1
P=1



[READBLOCK]
CS=1
SCK=0
CS=0
_SEND(00000011b)	;cmd
LOOP=(23,0){SI=ADR[I],SCK=P}
SI=1
LOOP=($BLOCKSIZE){
LOOP=(7,0){SCK=1,DATA[I]=SO,SCK=0}
ADR=+1
}
CS=1
P=1



[WRITEINIT]
HOLD=1
WP=1
CS=1
SCK=0
CS=0
_SEND(00000110b)   ; Write enable
SI=1,CS=1
P=20
CS=0,SI=0
_SEND(00000001b)   ;WRSR 
_SEND(00000000b)   ;Status Register
SI=1,CS=1
P=12000


[WRITE]
WP=1
SCK=0
CS=0,SI=0
_SEND(00000110b)   ; Write enable
SI=1,CS=1
P=20
CS=0,SI=0
_SEND(00000010b)   ; Write
LOOP=(23,0){SI=ADR[I],SCK=P}
LOOP=(7,0){SI=DATA[I],SCK=P}
SI=1,CS=1
P=$WDELAY


[WRITEBLOCK]                                 ; Запись блока 
WP=1
SCK=0
CS=0,SI=0
_SEND(00000110b)   ; Write enable
SI=1,CS=1
P=20
CS=0,SI=0
_SEND(00000010b)   ; Write
LOOP=(23,0){SI=ADR[I],SCK=P}
LOOP=($BLOCKSIZE){LOOP=(7,0){SI=DATA[I],SCK=P},ADR=+1}
SI=1,CS=1
_WAITWR



[ReadStatus]
SCK=0
CS=1
CS=0
_SEND(00000101b)
SI=1
LOOP=(7,0){SCK=1,R9[I]=SO,SCK=0}
CS=1
P=10
GET=("Status Register",R9)


[WriteStatus]
GET=("Status Register",R9)
RA?0{EXIT}
HOLD=1
WP=1
SCK=0

CS=0
_SEND(00000110b)   ; Write enable
CS=1
P=100

CS=0
_SEND(00000001b)                      	; WRSR
_SEND(R9)
CS=1
P=$WDELAY
P=$WDELAY