; Orange programmer module v1.5
; (c) 1999-2003 Victor Filipyev, CnCLab
; Ramtron SPI: 
; CHIP=FM25160,2K,fm25160.hpl  

; Warning - FM25C160 has another protocol!


SOCKET=4 ;"SPI"

PINO=SCK,0
PINO=SI,1
PINO=CS,2
PINO=WP,3
PINO=HOLD,4
PINI=SO,1

CDELAY=4 ; one set delay

R9=Status,WPEN,x,x,x,x,BP1,BP0,WEL,x

[_SEND]
LOOP=(7,0){SI=R0[I],SCK=1,SCK=0}


[INIT]
CS=1,HOLD=1,SCK=0
WP=0

[READ]
CS=0

LOOP=(12,8){SI=ADR[I],SCK=1,SCK=0}
SI=0,SCK=1,SCK=0
SI=1,SCK=1,SCK=0
SI=1,SCK=1,SCK=0
LOOP=(7,0){SI=ADR[I],SCK=1,SCK=0}

SI=1
LOOP=(7,0){SCK=1,DATA[I]=SO,SCK=0}
CS=1


[WRITE]
HOLD=1
WP=1,CS=1
SCK=0,CS=0

R0=00000110b
LOOP=(7,0){SI=R0[I],SCK=1,SCK=0}

CS=1


HOLD=1
WP=1
CS=1
SCK=0

CS=0

LOOP=(12,8){SI=ADR[I],SCK=1,SCK=0}
SI=0,SCK=1,SCK=0
SI=1,SCK=1,SCK=0
SI=0,SCK=1,SCK=0
LOOP=(7,0){SI=ADR[I],SCK=1,SCK=0}

LOOP=(7,0){SI=DATA[I],SCK=1,SCK=0}

CS=1

HOLD=1
WP=1
CS=1
SCK=0

CS=0

R0=00000100b
LOOP=(7,0){SI=R0[I],SCK=1,SCK=0}

CS=1

P=5000


[ReadStatus]
WP=1
CS=0
R0=00000101b                      	; RDSR
LOOP=(7,0){SI=R0[I],SCK=1,SCK=0}
SI=1
LOOP=(7,0){SCK=1,R9[I]=SO,SCK=0}
CS=1
P=10
GET=("Status Register",R9)



[WriteStatus]
GET=("Status Register",R9)
RA?0{EXIT}
HOLD=1
WP=1
SCK=0

CS=0
R0=00000110b   ; Write enable
LOOP=(7,0){SI=R0[I],SCK=1,SCK=0}
CS=1
P=200

CS=0
R0=00000001b                      	; WRSR
LOOP=(7,0){SI=R0[I],SCK=1,SCK=0}
LOOP=(7,0){SI=R9[I],SCK=1,SCK=0}
CS=1
P=200000