; Orange programmer module v1.7
; (c) 1999-2007 Victor Filipyev, CnCLab
; ST SPI:
; CHIP=ST95P02,256,ST95P08.hpl
; CHIP=ST95P04,512,ST95P08.hpl
; CHIP=ST95P08,1K,ST95P08.hpl

;tested ST95P08

SOCKET=4 ;"SPI"

PINO=SCK,0
PINO=SI,1
PINO=CS,2
PINO=WP,3
PINO=HOLD,4
PINI=SO,1

CDELAY=4 ; one set delay

R9=Status,C4,BP1,BP0,WEL,WIP

[_SEND]
LOOP=(7,0){SI=R0[I],SCK=P}


[INIT]
CS=1,HOLD=1,SCK=0
WP=0

[READ]
CS=0

LOOP=(12,8){SI=ADR[I],SCK=P}
SI=0,SCK=P
SI=1,SCK=P
SI=1,SCK=P
LOOP=(7,0){SI=ADR[I],SCK=P}

SI=1
LOOP=(7,0){SCK=1,DATA[I]=SO,SCK=0}
CS=1


[WRITE]
HOLD=1
WP=1,CS=1
SCK=0,CS=0

_SEND(00000110b)

CS=1


HOLD=1
WP=1
CS=1
SCK=0

CS=0

LOOP=(12,8){SI=ADR[I],SCK=P}
SI=0,SCK=P
SI=1,SCK=P
SI=0,SCK=P
LOOP=(7,0){SI=ADR[I],SCK=P}

LOOP=(7,0){SI=DATA[I],SCK=P}

CS=1

HOLD=1
WP=1
CS=1
SCK=0

CS=0
_SEND(00000100b)
CS=1

P=5000


[ReadStatus]
WP=1
CS=0
_SEND(00000101b)                      	; RDSR
SI=1
LOOP=(7,0){SCK=1,R9[I]=SO,SCK=0}
CS=1
P=10
GET=("Status Register",R9)



[WriteStatus]
GET=("Status Register",R9)
RA?0{EXIT}
R9=|0xF0
HOLD=1
WP=1
SCK=0

CS=0
_SEND(00000110b)   ; Write enable
CS=1
P=200

CS=0
_SEND(00000001b)                      	; WRSR
_SEND(R9)
CS=1
P=200000